CMOS : circuit design layout & simulation (Record no. 201101)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00703nam a2200241Ia 4500 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | OSt |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20260921095020.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 210219s9999||||xx |||||||||||||| ||und|| |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9780470881323 |
| 041 ## - LANGUAGE CODE | |
| Language code of text/sound track or separate title | eng |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.39732 BAK-C |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Baker, Jacob. R. |
| 245 #0 - TITLE STATEMENT | |
| Title | CMOS : circuit design layout & simulation |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 3rd |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | New York, |
| Name of publisher | Wiley & Sons, |
| Year of publication | 2005 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | xxiv, 1173p |
| 440 ## - SERIES STATEMENT/ADDED ENTRY--TITLE | |
| Title | IEEE series on microelectron systems |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Integrated circuits — Design and construction |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Metal oxide semiconductors |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Electronics circuit design |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Books and Monographs |
| Full call number | Accession Number | Koha item type | Lost status | Damaged status | Permanent Location | Current Location | Shelving location | Date acquired |
|---|---|---|---|---|---|---|---|---|
| 621.39732 BAK-C | 84461 | Books and Monographs | Central Library, NIT Jalandhar | Central Library, NIT Jalandhar | General Stacks | 20.02.2021 |