Tejabhai Vaghela Hardik <br/><br/>
Design and analysis of tunnel fet for low power cmos circuit applications 
Tejabhai Vaghela Hardik 
 - Dr.B.R.Amb 
 - Jalandhar  Dr.B.R.Ambedkar  National Institute of T  2015 
 - xi 74p 
<br/><br/><label>Dewey Class. No.: </label>621.38  / TE-D