VLSI memory chip design

By:

Itoh, Kiyoo

Material type: Text

TextLanguage: English Series: Springer series in advanced microelectronics ; v. 5Publication details: Berlin ; Heidelberg ; New York : Springer, 2001.Description: xi, 495pISBN:

978-3642087363

Subject(s):

DDC classification:

621.39732 ITO-V

Summary: A systematic description of microelectronic device design. Topics range from the basics to low-power and ultralow-voltage designs, subthreshold current reduction, memory subsystem designs for modern DRAMs, and various on-chip supply-voltage conversion techniques. It also covers process and device issues as well as design issues relating to systems, circuits, devices and processes, such as signal-to-noise and redundancy.

Item type: Books and Monographs

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Title notes ( 2 )

Holdings
Item type	Current library	Home library	Collection	Call number	Materials specified	Status	Date due	Barcode
Books and Monographs	Central Library, NIT Jalandhar General Stacks	Central Library, NIT Jalandhar	Electronics and Communication Engineering	621.39732 ITO-V (Browse shelf(Opens below))		Available		103165

Originally published as a hardcover first edition in 2001.

A systematic description of microelectronic device design. Topics range from the basics to low-power and ultralow-voltage designs, subthreshold current reduction, memory subsystem designs for modern DRAMs, and various on-chip supply-voltage conversion techniques. It also covers process and device issues as well as design issues relating to systems, circuits, devices and processes, such as signal-to-noise and redundancy.

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