| 000 | 00437nam a2200133Ia 4500 | ||
|---|---|---|---|
| 008 | 211018s9999||||xx |||||||||||||| ||und|| | ||
| 082 |
_a621.3813621 _bAG-D |
||
| 100 |
_aAggarwal, Eeshant. _928306 |
||
| 245 | 0 |
_a Determination of DDR3 SDRAM timing parameters using power on reset test case. _cAggarwal |
|
| 250 | _aDr.B.R.Amb | ||
| 260 |
_aJalandhar. _bDr.B.R.Ambedkar National Institute of Te _c2014 |
||
| 300 | _axiv; 94p | ||
| 942 | _cTH | ||
| 999 |
_c196023 _d196023 |
||